Strategies of implementing memristors as second-order devices
The aim of this exercise or first draft is to train the strategy of transforming and diamondizing buffer-like constructions between agents into interactional procedures to avoid unnecessary wastage of resources. This is not supporting the new global mega-trend of parsimonious thriftiness but tries to open up a more liberated play of interactionality for nano-electronic devices.
Hence, memristive systems are conceived as second-order constructions. A crucial conceptual challenge for such an approach is given by the chance to diamondize HP’s memristive flip-flop circuit towards a more interactional and diamondized implementation.
Interactionality and memristive systems
This new approach shall be experienced with the transformation of a channel-based to an interaction-based design of a flip-flop circuit.
How can a memristor construction save the states of a flip-flop device after a power crash and enabling the flip-flop to continue to work at the state it crashed after the power is re-established?
In other words, how can a volatile flip-flop be modified to a nonvolatile flip-flop device as the basic unit of a nonvolatile processor design?
This is an attempt to connect CMOS circuits with memristors. It is therefore not attempted to create processors on the base of memristors alone.
Recall the definition of a master-slave flip-flop:
"A master–slave D flip-flop is created by connecting two gated D latches in series, and inverting the enable input to one of them. It is called master–slave because the second latch in the series only changes in response to a change in the first (master) latch.” (WiKi)
A master-slave flip-flop is a serial connection of two latches.
The whole approach, to add memristors to CMOS, might be turned into the possibility to program memristive systems connected with CMOS devices to change the behavior of the CMOS systems and not only to save their functioning after a power collapse.
It would be another challenge to construct a flip-flop on the base of memristors only.
A first step would be to consider a translation from the material implication plus negativ constant to NAND gates. If the whole construction is based on memristors, a special memristive save-system for the case of power interruptions seems then to become obsolete.
Discussion and interpretations of the diamond approach
What has to be saved by the memristive device are in fact not the first-order data of FF but the conditions of the possibility of the data, i.e. the data of the matching condition of the composition of the master and the slave flip-flop morphisms (processes). From those conditions, as second-order constructs, the first-order data might be reconstructed on the base of the second-order data saved by the memristive device.
In other words, the history saved by the memristor are not the primary data but the data of the history. Historical data are data of data. Those second-order data might then be used to continue processing on the first-order level of the flip-flop.
As a metaphor, the data of an observer of a data processing system are not the data of the observed system. But such observer-depending data of second-order might be given ‘back’ to the observed, i.e. first-order system to continue its game. Hence, the memristor is playing the game of an observer which is lending or giving away his data to the observed system.
The memristive system is primarily storing the rules of the observed game and only secondarily the data involved.
If the “Big Masters”(Master/Slave)fail, the wee masters (master/slave) are in charge, delivering the(ir) carried (stored) information, collected by permanent second-order observations, about the last cycle(s) of the big game. Their role, thus, plays in inverse temporal order (history) and on a second-order level in the tectonics of the system in respect to the big masters. The big masters are playing in CMOS, the wee masters, complementary, in memristors.
The play of the master and the slave as such is, if realized, represented by the compositional play, i.e. in the third system as the composition of system1, FF1, and system2, FF2.
If the play fails, the wee masters are still in charge because they are representing with their memristive capability the history of the ended game represented in the matching conditions of the big game. Hence, if the big masters enters the game again by the power renewed, the wee masters are offering their data to continue at the same level, where their game got interrupted. This is possible by the interplay of the volatile CMOS flip-flop FF and the nonvolatile memristive flip-flop ff functionalities.
Hence again, what is the crucial difference of the proposed sketch for an interactional approach to the buffer-like implementation of HP’s circuit?
Diamondization is reflecting the matching conditions (MC) of the composition of the flip-flop construction. Without the MCs, the construction is not working. In an technical model, if the power, which obviously is part of the MCs too, breaks down for the first-order device, the matching conditions as such remains and are represented by their last status, i.e. stored, in the complementary mapping of the second-order level, which is technically realized by a memristive element.
A distinction of “activated” and “non-activated” first- and second-order levels of permanently installed devices, CMOS and memristive, are in order.
This interactional modeling tries to avoid the disadvantages of a channel modeling of the interactions between Master FF and Slave FF by introducing their double role in an interaction, i.e. as ‘big’ Masters and ‘wee’ masters and respectively as ‘big’ Slaves and ‘wee’ slaves.
In other words, if an interaction shall happen between two agents, then both are simultaneously in an active and in a passive role.
The Master is able to act on a Slave only if the Slave is enabling this approach. Thus, as an enabler, the Slave acts as an active master and the Master becomes a slave.
The other way round, the Slave is able to be addressed by a Master as a Slave only if the Slave is accepting this approach to be addressed. Thus, as an enabler to be addressed, the slave acts actively as a Master.
Both turns are pre-installed by the designer of a classical FF and are not realized by the interaction of the device.
HP’s construction is using the flip-flop channel as a memristive buffer, and is not yet exploiting the possibilities of the interactivity of the master/slave relationship by the involvement of the memristor.
The concepts of complementarity, simultaneity and antidromicity are not yet used in the construction of HP’s memristive FF device.
Nevertheless, it is the merit of HP’s research team to have opened up unforeseen possibilities for new developments in computing in the large, in hardware, software and architectonics of computing systems.